? semiconductor components industries, llc, 2005 march, 2005 ? rev. 7 1 publication order number: l4949/d l4949, ncv4949 100 ma, 5.0 v, low dropout voltage regulator with power-on reset the l4949 is a monolithic integrated 5.0 v voltage regulator with a very low dropout and additional functions such as power?on reset and input voltage sense. it is designed for supplying the micro?computer controlled systems especially in automotive applications. features ? pb?free package is available ? operating dc supply voltage range 5.0 v to 28 v ? transient supply voltage up to 40 v ? extremely low quiescent current in standby mode ? high precision standby output voltage 5.0 v 1% ? output current capability up to 100 ma ? very low dropout voltage less than 0.4 v ? reset circuit sensing the output voltage ? programmable reset pulse delay with external capacitor ? voltage sense comparator ? thermal shutdown and short circuit protections ? ncv prefix for automotive and other applications requiring site and control changes regulator 1.23 v ref 2.0 v 2.0 a reset 1.23 v sense gnd sense output (s o ) reset sense input (s i ) supply voltage (v cc ) v z output voltage (v out ) c t 38 4 6 7 5 2 1 v s + - + - preregulator 6.0 v figure 1. representative block diagram http://onsemi.com (top view) pin connections 1 2 3 4 8 7 6 5 v z c t gnd s i v cc reset s o v out soic?8 d suffix case 751 pdip?8 n suffix case 626 1 8 1 8 1 8 l4949n awl yyww alywd l4949 1 8 see detailed ordering and shipping information in the package dimensions section on page 8 of this data sheet. ordering information a = assembly location wl, l = wafer lot yy, y = year ww, w = work week marking diagrams 1 20 soic?20w dw suffix case 751d 20 1 l4949dw awlyyww
l4949, ncv4949 http://onsemi.com 2 absolute maximum ratings rating symbol value unit dc operating supply voltage v cc 28 v transient supply voltage (t < 1.0 s) v cc tr 40 v output current i out internally limited ? output voltage v out 20 v sense input current i si 1.0 ma sense input voltage v si v cc ? output voltages v reset output v reset 20 sense output v so 20 output currents ma reset output i reset 5.0 sense output i so 5.0 preregulator output voltage v z 7.0 v preregulator output current i z 5.0 ma esd protection at any pin v human body model ? 2000 machine model ? 400 thermal resistance, junction?to?air r ja c/w p suffix, dip?8 plastic package, case 626 100 d suffix, soic?8 plastic package, case 751 200 operating temperature range t a ?40 to +125 c maximum junction temperature t j 150 c storage temperature range t stg ?65 to +150 c maximum ratings are those values beyond which device damage can occur. maximum ratings applied to the device are individual str ess limit values (not normal operating conditions) and are not valid simultaneously. if these limits are exceeded, device functional operation i s not implied, damage may occur and reliability may be affected. note: esd data available upon request. electrical characteristics (v cc = 14 v, ?40 c < t a < 125 c, unless otherwise specified.) characteristic symbol min typ max unit output voltage (t a = 25 c, i out = 1.0 ma) v out 4.95 5.0 5.05 v output voltage (6.0 v < v cc < 28 v, 1.0 ma < i out < 50 ma) v out 4.9 5.0 5.1 v output voltage (v cc = 35 v, t < 1.0 s, 1.0 ma < i out < 50 ma) v out 4.9 5.0 5.1 v dropout voltage v drop v i out = 10 ma ? 0.1 0.25 i out = 50 ma ? 0.2 0.40 i out = 100 ma ? 0.3 0.50 input to output voltage difference in undervoltage condition v io ? 0.2 0.4 v (v cc = 4.0 v, i out = 35 ma) line regulation (6.0 v < v cc < 28 v, i out = 1.0 ma) reg line ? 1.0 20 mv load regulation (1.0 ma < i out < 100 ma) reg load ? 8.0 30 mv current limit i lim ma v out = 4.5 v 105 200 400 v out = 0 v ? 100 ? quiescent current (i out = 0.3 ma, t a < 100 c) i qse ? 150 260 a quiescent current (i out = 100 ma) i q ? ? 5.0 ma
l4949, ncv4949 http://onsemi.com 3 electrical characteristics (continued) (v cc = 14 v, ?40 c < t a < 125 c, unless otherwise specified.) characteristic unit max typ min symbol reset reset threshold voltage v resth ? v out ? 0.5 ? v reset threshold hysteresis v resth,hys mv @ t a = 25 c 50 100 200 @ t a = ?40 to +125 c 50 ? 300 reset pulse delay (c t = 100 nf, t r 100 s) t resd 55 100 180 ms reset reaction time (c t = 100 nf) t resr ? 5.0 30 s reset output low voltage (r reset = 10 k to v out , v cc 3.0 v) v resl ? ? 0.4 v reset output high leakage current (v reset = 5.0 v) i resh ? ? 1.0 a delay comparator threshold v ctth ? 2.0 ? v delay comparator threshold hysteresis v ctth, hys ? 100 ? mv sense sense low threshold (v si decreasing = 1.5 v to 1.0 v) v soth 1.16 1.23 1.35 v sense threshold hysteresis v soth,hys 20 100 200 mv sense output low voltage (v si 1.16 v, v cc 3.0 v, r so = 10 k to v out ) v sol ? ? 0.4 v sense output leakage (v so = 5.0 v, v si 1.5 v) i soh ? ? 1.0 a sense input current i si ?1.0 0.1 1.0 a preregulator preregulator output voltage (i z = 10 a) v z ? 6.3 ? v pin function description pin soic?8, pdip?8 pin soic?20w symbol description 1 19 v cc supply voltage 2 20 s i input of sense comparator 3 1 v z output of preregulator 4 2 c t reset delay capacitor 5 4 ? 7, 14 ? 17 gnd ground 6 10 reset output of reset comparator 7 11 s o output of sense comparator 8 12 v out main regulator output ? 3, 8, 9, 13, 18 nc no connect
l4949, ncv4949 http://onsemi.com 4 4.96 4.98 5.0 5.02 5.04 -40 -20 0 40 60 20 100 120 t j , junction temperature ( c) 80 v cc = 14 v i out = 1.0 ma v out , output voltage (v) 0 2.0 3.0 4.0 6.0 010 v cc , supply voltage (v) 1.0 1.0 t j = 25 c r l = 100 r l = 5.0 k 5.0 v out , output voltage (v) 2.0 3.0 4.0 5.0 6.0 7.0 8.0 9.0 typical characterization curves 0 100 150 200 250 0.1 100 i out , output current (ma) 10 1.0 50 t j = 25 c v drop , dropout voltage (mv) 0 0.10 0.20 0.30 0.40 -40 -20 0 40 60 20 100 120 t j , junction temperature ( c) 80 v drop , dropout voltage (mv) i out = 50 ma i out = 10 ma i out = 100 ma 3.0 2.5 2.0 1.5 1.0 0.1 1.0 10 100 0.5 0 v cc = 14 v t j = 25 c i out , output current (ma) i q , quiescent current (ma) 3.0 2.5 2.0 1.5 1.0 0 5.0 10 15 20 25 30 v cc , supply voltage (v) 0.5 0 r l = 5.0 k r l = 100 t j = 25 c i q , quiescent current (ma) figure 2. output voltage versus junction temperature figure 3. output voltage versus supply voltage figure 4. dropout voltage versus output current figure 5. dropout voltage versus junction temperature figure 6. quiescent current versus output current figure 7. quiescent current versus supply voltage
l4949, ncv4949 http://onsemi.com 5 typical characterization curves (continued) 6.0 5.0 4.0 3.0 2.0 4.0 4.1 v out , output voltage (v) 1.0 0 resistor 10 k from reset output to 5.0 v t j = 25 c v reset , reset output (v) 4.2 4.3 4.4 4.5 4.6 4.7 4.8 4.9 5.0 4.7 4.66 4.62 4.58 4.5 -40 -20 t j , junction temperature ( c) 4.46 4.42 upper threshold v reset , reset threshold voltage (v) 0 20 40 60 80 100 120 4.54 lower threshold figure 8. reset output versus regulator output voltage figure 9. reset thresholds versus junction temperature 6.0 5.0 4.0 2.0 1.0 1.15 v si , sense input voltage (v) 1.0 0 t j = 25 c v so , sense output voltage (v) 1.2 1.25 1.3 1.35 1.4 1.45 1.5 3.0 resistor 10 k from sense output to 5.0 v 1.1 1.05 1.4 1.38 1.36 1.34 1.3 -40 -20 t j , junction temperature ( c) 1.28 1.2 upper threshold v si , sense input voltage (v) 0 20 40 60 80 100 120 1.32 lower threshold 1.26 1.24 1.22 figure 10. sense output versus sense input voltage figure 11. sense thresholds versus junction temperature
l4949, ncv4949 http://onsemi.com 6 application information supply voltage transient high supply voltage transients can cause a reset output signal perturbation. for supply voltages greater than 8.0 v the circuit shows a high immunity of the reset output against supply transients of more than 100 v/ s. for supply voltages less than 8.0 v supply transients of more than 0.4 v/ s can cause a reset signal perturbation. to improve the transient behavior for supply voltages less than 8.0 v a capacitor at pin 3 can be used. a capacitor at pin 3 (c3 1.0 f) reduces also the output noise. s o v z (optional) v out v out v bat c s c o c3 r so 10 k regulator 1.23 v ref 2.0 v 2.0 a reset 1.23 v sense gnd reset s i v cc c t 38 4 6 7 5 2 1 v cc + - + - preregulator 6.0 v 10 k figure 12. application schematic note: 1. for stability: c s 1.0 f, c o 4.7 f, esr < 10 at 10 khz 2. recommended for application: c s = c o = 10 f
l4949, ncv4949 http://onsemi.com 7 operating description the l4949 is a monolithic integrated low dropout voltage regulator. several outstanding features and auxiliary functions are implemented to meet the requirements of supplying microprocessor systems in automotive applications. nevertheless, it is suitable also in other applications where the present functions are required. the modular approach of this device allows the use of other features and functions independently when required. voltage regulator the voltage regulator uses an isolated collector vertical pnp transistor as a regulating element. with this structure, very low dropout voltage at currents up to 100 ma is obtained. the dropout operation of the standby regulator is maintained down to 3.0 v input supply voltage. the output voltage is regulated up to the transient input supply voltage of 35 v. with this feature no functional interruption due to overvoltage pulses is generated. the typical curve showing the standby output voltage as a function of the input supply voltage is shown in figure 14. the current consumption of the device (quiescent current) is less than 200 a. to reduce the quiescent current peak in the undervoltage region and to improve the transient response in this region, the dropout voltage is controlled. the quiescent current as a function of the supply input voltage is shown in figure 15. short circuit protection: the maximum output current is internally limited. in case of short circuit, the output current is foldback current limited as described in figure 13. 0 5.0 20 100 200 i out (ma) figure 13. foldback characteristic of v out v out (v) 10 v out 5.0 v 35 v 5.0 v 2.0 v 0 v v out v cc figure 14. output voltage versus supply voltage 3.0 figure 15. quiescent current versus supply voltage 2.5 2.0 1.5 1.0 0 5.0 10 15 20 25 30 v cc , supply voltage (v) 0.5 0 r l = 5.0 k r l = 100 t j = 25 c i q , quiescent current (ma) preregulator to improve the transient immunity a preregulator stabilizes the internal supply voltage to 6.0 v. this internal voltage is present at pin 3 (v z ). this voltage should not be used as an output because the output capability is very small ( 100 a). this output may be used as an option when better transient behavior for supply voltages less than 8.0 v is required. in this case a capacitor (100 nf ? 1.0 f) must be connected between pin 3 and gnd. if this feature is not used pin 3 must be left open.
l4949, ncv4949 http://onsemi.com 8 reset circuit the block circuit diagram of the reset circuit is shown in figure 16. the reset circuit supervises the output voltage. the reset threshold of 4.5 v is defined with the internal reference voltage and standby output divider. the reset pulse delay time t rd , is defined with the charge time of an external capacitor c t : t rd c t x2.0v 2.0 a the reaction time of the reset circuit originates from the discharge time limitation of the reset capacitor c t and is proportional to the value of c t . the reaction time of the reset circuit increases the noise immunity. 1.23 v v ref 22 k out reg 2.0 a c t 2.0 v + - reset figure 16. reset circuit standby output voltage drops below the reset threshold only a bit longer than the reaction time results in a shorter reset delay time. the nominal reset delay time will be generated for standby output voltage drops longer than approximately 50 s. the typical reset output waveforms are shown in figure 17. vrt + 0.1 v 5.0 v ukt v out 3.0 v reset v out1 v in 40 v t t r t rd t rd t rr switch on input drop dump output overload switch off figure 17. typical reset output waveforms sense comparator the sense comparator compares an input signal with an internal voltage reference of typical 1.23 v. the use of an external voltage divider makes this comparator very flexible in the application. it can be used to supervise the input voltage either before or after the protection diode and to give additional information to the microprocessor like low voltage warnings. ordering information device operating temperature range package shipping 2 l4949n pdip?8 50 units / rail l4949ng pdip?8 (pb?free) 50 units / rail l4949d soic?8 98 units / rail l4949dg soic?8 (pb?free) 98 units / rail L4949DR2 t j = ?40 c to +125 c soic?8 2500 units / tape & reel L4949DR2g j soic?8 (pb?free) 2500 units / tape & reel ncv4949dr2* soic?8 2500 units / tape & reel ncv4949dr2g* soic?8 (pb?free) 2500 units / tape & reel ncv4949dwr2* soic?20w 1000 units / tape & reel 2for information on tape and reel specifications,including part orientation and tape sizes, please refer to our tape and reel p ackaging specifications brochure, brd8011/d. *ncv4949: t low = ?40 c, t high = +125 c. guaranteed by design. ncv prefix is for automotive and other applications requiring site and change control.
l4949, ncv4949 http://onsemi.com 9 package dimensions n suffix plastic package case 626?05 issue l notes: 1. dimension l to center of lead when formed parallel. 2. package contour optional (round or square corners). 3. dimensioning and tolerancing per ansi y14.5m, 1982. 14 5 8 f note 2 ?a? ?b? ?t? seating plane h j g d k n c l m m a m 0.13 (0.005) b m t dim min max min max inches millimeters a 9.40 10.16 0.370 0.400 b 6.10 6.60 0.240 0.260 c 3.94 4.45 0.155 0.175 d 0.38 0.51 0.015 0.020 f 1.02 1.78 0.040 0.070 g 2.54 bsc 0.100 bsc h 0.76 1.27 0.030 0.050 j 0.20 0.30 0.008 0.012 k 2.92 3.43 0.115 0.135 l 7.62 bsc 0.300 bsc m --- 10 --- 10 n 0.76 1.01 0.030 0.040 soic?20 wb dw suffix case 751d?05 issue g 20 1 11 10 b 20x h 10x c l 18x a1 a seating plane h x 45 e d m 0.25 m b m 0.25 s a s b t e t b a dim min max millimeters a 2.35 2.65 a1 0.10 0.25 b 0.35 0.49 c 0.23 0.32 d 12.65 12.95 e 7.40 7.60 e 1.27 bsc h 10.05 10.55 h 0.25 0.75 l 0.50 0.90 0 7 notes: 1. dimensions are in millimeters. 2. interpret dimensions and tolerances per asme y14.5m, 1994. 3. dimensions d and e do not include mold protrusion. 4. maximum mold protrusion 0.15 per side. 5. dimension b does not include dambar protrusion. allowable protrusion shall be 0.13 total in excess of b dimension at maximum material condition.
l4949, ncv4949 http://onsemi.com 10 package dimensions soic?8 d suffix case 751?07 issue ae seating plane 1 4 5 8 n j x 45 k notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: millimeter. 3. dimension a and b do not include mold protrusion. 4. maximum mold protrusion 0.15 (0.006) per side. 5. dimension d does not include dambar protrusion. allowable dambar protrusion shall be 0.127 (0.005) total in excess of the d dimension at maximum material condition. 6. 751?01 thru 751?06 are obsolete. new standard is 751?07. a b s d h c 0.10 (0.004) dim a min max min max inches 4.80 5.00 0.189 0.197 millimeters b 3.80 4.00 0.150 0.157 c 1.35 1.75 0.053 0.069 d 0.33 0.51 0.013 0.020 g 1.27 bsc 0.050 bsc h 0.10 0.25 0.004 0.010 j 0.19 0.25 0.007 0.010 k 0.40 1.27 0.016 0.050 m 0 8 0 8 n 0.25 0.50 0.010 0.020 s 5.80 6.20 0.228 0.244 ?x? ?y? g m y m 0.25 (0.010) ?z? y m 0.25 (0.010) z s x s m *for additional information on our pb?free strategy and soldering details, please download the on semiconductor soldering and mounting techniques reference manual, solderrm/d. soldering footprint* 1.52 0.060 7.0 0.275 0.6 0.024 1.270 0.050 4.0 0.155 mm inches scale 6:1 on semiconductor and are registered trademarks of semiconductor components industries, llc (scillc). scillc reserves the right to mak e changes without further notice to any products herein. scillc makes no warranty, representation or guarantee regarding the suitability of its products for an y particular purpose, nor does scillc assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including wi thout limitation special, consequential or incidental damages. atypicalo parameters which may be provided in scillc data sheets and/or specifications can and do vary in different application s and actual performance may vary over time. all operating parameters, including atypicalso must be validated for each customer application by customer's technical experts. scillc does not convey any license under its patent rights nor the rights of others. scillc products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the scillc product could create a sit uation where personal injury or death may occur. should buyer purchase or use scillc products for any such unintended or unauthorized application, buyer shall indemnify and hold scillc and its officers, employees, subsidiaries, af filiates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, direct ly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that scillc was negligent regarding the design or manufacture of the part. scillc is an equal opportunity/affirmative action employer. this literature is subject to all applicable copyright laws and is not for resale in any manner. publication ordering information n. american technical support : 800?282?9855 toll free usa/canada japan : on semiconductor, japan customer focus center 2?9?1 kamimeguro, meguro?ku, tokyo, japan 153?0051 phone : 81?3?5773?3850 l4949/d literature fulfillment : literature distribution center for on semiconductor p.o. box 61312, phoenix, arizona 85082?1312 usa phone : 480?829?7710 or 800?344?3860 toll free usa/canada fax : 480?829?7709 or 800?344?3867 toll free usa/canada email : orderlit@onsemi.com on semiconductor website : http://onsemi.com order literature : http://www.onsemi.com/litorder for additional information, please contact your local sales representative.
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